Analogue gates

ABSTRACT

An analogue gate with a short response time comprises a fieldeffect transistor whose source or drain is connected to the input, the other electrode to the output. It is triggered from the blocking to the conducting state by a follower which places the gate voltage at the same level as the source voltage and is blocked by means which establish a conductive path from the gate to a suitable voltage source.

United States Patent Desperques-Volmier 1 Sept. 23, 1975 1 ANALOGUEGATES Primary Examiner-James B. Mullins 7 t t t 5] or sgzf volmler' PansAttorney, Agent, or Firm-Cushman. Darby &

Cushman [73] Assignee: Thornson-CSF, Paris, France [22] Filed: May 2,i974 211 Appl. No.: 466,471 [571 ABSTRACT An analogue gate with a shortresponse time comoreign Application Priority Data prises a field-effecttransistor whose source or drain is May a. 1973 France 73.16511connected t the p the other electrode t t utput. it is triggered fromthe blocking to the conducting [52] 0.5. CI 307/251; 307/304 state by afollower which places the gate voltage at the [51] Int. Cl. 1103K 17/60ame l vel as the source voltage and is blocked by [58] Field of Search307/246, 251, 300, 304; means which establish a conductive path from thegate 328/!51 to a suitable voltage source.

[56] References Cited 6 Claims, 3 Drawing Figures UNITED STATES PATENTS3.586.880 6/l97l Fitzwater 307/25l X LOAD SWITCH US Patent Sept. 23,1975Sheet 1 of3 3,908,136

US Patent Sept. 23,1975 Sheet 2 0f3 3,908,136

US Patent Sept. 23,1975 Sheet 3 of3 3,908,136

ANALOGUE GATES The present invention relates to an analogue gate,

that is to say an electrical circuit with an input and an output and anelectronic control element. The application to this control element of avoltage that can adopt two logic levels referred to as O and 1, enablessaid circuit to be given either a substantially impedance (out putvoltage equals the input voltage) or a very high impedanee (outputvoltage 0), the input voltage varying continuously between two givenextreme values.

It is well known to manufacture circuits of this kind by means offield-effect transistors, these transistors being rendered conductive orbeing blocked, by the application of an appropriate voltage to theircontrol gate. The main drawback of these circuits is that they have asubstantial response time. As a matter of fact, the gate does notgenerally have any conductive path for evacuating the charges of thegate-drain capacitance, when the element is triggered from theconductive state to the blocked state.

The object of the present invention is an analogue gate comprising afield-effect transistor which is free of these drawbacks.

The analogue gate in accordance with the invention comprises a firstfield-effect transistor, having a source receiving the input voltage, adrain supplying the output voltage and a gate, a switch, having oneoutput connected to said transistor gate, a first input connected to afixed potential capable of blocking said transistor, and a second input;a voltage follower, having an input connected to said drain, an outputconnected to said second switch input; said switch having a controlinput for switching at will, said two switch inputs to said switchoutput.

The present invention will be better understood from a consideration ofthe following description and by reference to the attached drawings inwhich:

FIG. I illustrates a block circuit diagram of the device in accordancewith the invention.

FIG. 2 illustrates an example of the invention.

FIG. 3 illustrates the circuit of FIG. 2 formed in integrated fashion ona single substrate.

In FIG. I, the field-effect transistor T, which is the main element ofthe analogue gate, has its source connected to the input terminal V ofthe device. To this input terminal is applied a voltage which variescontinuously between two predetermined values, for example 2 volts and+2 volts. Its drain is connected to the output terminal S which is inturn earthed across a load C. Its drain is connected on the other handto the input of the voltage-follower T whose output reconstitutes thevoltage at S. thus operates as an impedancematching device having a highinput impedance and a low output impedance.

The output of the follower is connected to an input E, ofa switch 1whose other input E is connected to the negative pole P of a voltagesource, which when applied to the gate of the transistor. is capableofblocking the transistor T,. The switch I has a control input E,.supplied with a two-level voltage which respectively places it in twostates respectively indicated by and 1.

In the I) state, the input E of the switch is connected to the output G,whilst in the 1 state, the input E, ofthe switch is connected to theoutput G.

The operation of the system is as follows:

a. state I: the input E, is connected to the gate of the transistor T,.The result is that this gate is at the drain potential of the sametransistor. Whatever the type of transistor involved, provided that itsconduction channel exists at a potential difference of Vds O (transistorof the depletion type), the transistor will be conductive and V b. state0: the output G is connected to the input E and the gate is connected tothe bias source P whose potential is chosen, in terms of polarity andamplitude, to be sufficiently high in order to block the transistor.When transistor is triggered from the conductive state to the blockedstate, the gate-drain capacitance of the transistor discharges acrossthe circuit comprising the amplifier T the switch G and the ground.Transistors currently being manufactured by microelectronic techniques,have a gate-drain capacitance which is sufficiently low for theircharging and discharging time to be neglected, whatever the resistanceacross which said charging or discharging takes place.

FIG. 2 illustrates an embodiment of the device shown in FIG. 1. In thisfigure, similar references designate similar elements to those shown inFIG. 1; all the fieldeffect transistors have an N-type channel and areof the depletion type. This circuit can be integrated. Theamplifier-follower is a field-effect transistor T whose gate isconnected to the drain of the transistor T,, the drain to the positiveterminal ofa battery E the source to the drain of a transistor T whosegate and source are interconnected and taken together to the negativeterminal ofa battery E The transistor T is therefore conductive at alltimes and can be considered as a variable resistor.

The source of the transistor T also is connected to the drain of afield-effect transistor T, the source of which is connected to the gateof the transistor T,, the gate to the drain of a transistor T The drainof the latter transistor is likewise connected to the gate of thetransistor T, across a resistor R,. Its source is connected to negativeterminal of the battery E Its gate is supplied with a two-level controlvoltage, one of said levels blocking the transistor T and the otherdriving it conductive.

As outlined hereinabove, in this non-[imitative example. all thetransistors of the depletion type have N-type channels. The inputvoltage varies between 2 volts and +2 volts. The battery E supplies 6volts, the battery E 6 volts. The voltage levels applied to the gate ofthe transistor T are respectively 6 volts (level l) and 8 volts (level0).

The transistor T is therefore conductive when its gate is at level I(Vgs 0) and is designed for being blocked when its gate is at the level0 (Vgs 2 volts).

Operation of the system is as follows:

a. the transistor T is blocked (level 0). No current flows across theresistor R, and the potential difference Vgs on the transistor T, is 0.The latter transistor is therefore conductive. The transistor T beingdesigned to follow the voltage V its source potential is substantiallyequal to the source potential of the transistor T This voltage isapplied to the gate of the transistor T, through the medium of thetransistor T so that the transistor T, is conductive. The voltage V, istherefore substantially equal to the input voltage V,;.

b. the transistor T is conductive. The drain voltage V, of saidtransistor is therefore around 6 volts.

A current flows across the resistor R. and this has the effect ofproducing a positive potential difference between the gate of thetransistor T. (potential substantially equal to -6 volts) and the sourceof said transistor, which potential is equal to (-6 volts +R. i), ibeing the current flowing through the resistor.

The transistor therefore tends to block although it retains a certainlevel of conductivity. The gate of the transistor T. is at a potentialof 6 volts +R. i, that is to say in the order of 4 volts.

its source voltage being equal to 2 volts at a minimum, and to +2 voltsat a maximum, it is therefore blocked as well.

It should be pointed out that when the transistor T. is triggered fromthe state I to the state 0, in this arrangement, the gate-draincapacitance of the transistor T. discharges across the resistor R. andthe transistor T,. which is conductive, the transistor T. acting as theswitch of FIG. 1.

An integrated circuit manufactured using micro components and designedon the basis of the foregoing data, has a response time of somenanoseconds and the absolute value V V. is less than 40 millivolts, whentransistor T. is conducting.

FIG. 3 illustrates an integrated embodiment of the circuit shown in FIG.2, the references employed there designating similar elements to thosethey designated previously, the substrate being of P+ type, the channelsbeing of N-type and the sources and drains of N+ type. The ohmiccontacts are of N+ type. Sources, gates and drains of each transistorhave an index indicating which transistor is involved. The transistorT., whose source S., gate G. and drain D. can be seen, is U-shaped.

The full lines illustrate the contours of the metallised areas; thechain dotted lines indicate the contours of the sources and drains (N+doped zones), whilst the broken lines indicate the gate contours (P+doped zones), the channels extending beneath the gates being illustratedby sets of dashes separated by three dots. The dashes illustrate thecontours of the N doped zones deposited by epitaxy upon the substratewhich is of P type. In the illustration, drain and source of thetransistor T. have been reversed. The drain D. extends beneath ametallised area acting as a contact and supplied with the voltage V Thesource S. extends beneath a metallised area which furnishes the voltageV The gate G, is connected to the source S.. The electrodes D.., D. andD are formed in one and the same diffusion operation, as also are thesources 8.. and S The gate 6., and the source 8.. are connected by thesame metallised area. The resistor R. is an N-doped zone. In the figure,the letters M, SD. C, G and N designate respectively the metallisedareas (M), the sources (S) and drains (D), the channels (C the gates (G)and the layers (N).

What i claim is:

1. An analogue gate comprising a first field-effect transistor, having asource receiving the input voltage, a drain supplying the output voltageand a gate. a switch, having one output connected to said transistorgate, a first input connected to a fixed potential capable of blockingsaid transistor. and a second input; a voltage follower, having an inputconnected to said drain, an output connected to said second switchinput; said switch having a control input, for switching at will, saidtwo switch inputs to said switch output.

2. A gate as claimed in claim 1 wherein said switch comprises a secondtransistor. having a source at a fixed potential. a drain and a gate forreceiving a twolevel voltage for blocking or unblocking said transistor.a third transistor having a source, a gate and a drain connected to saidvoltage follower output, said third transistor gate being connected tosaid second transistor drain. a resistor interconnecting said secondtransistor drain and said third transistor source.

3. A gate as claimed in claim 2, wherein said voltage follower comprisesa fourth transistor having a drain connected to another fixed potentialofa polarity opposite to said fixed potential, a gate connected to saidfirst transistor drain, and a source connected to said third transistordrain, and a further resistor for connecting said fourth transistorsource to said fixed potential.

4. A gate as claimed in claim 3, wherein said further resistorcomprises, a fifth transistor, having a drain connected to said fourthtransistor source and a gate and a source interconnected to said fixedpotential.

5. A gate as claimed in claim 4, wherein said transistors are of thedepletion type and have N-type channels.

6. A gate as claimed in claim I having components integrated upon thesame substrate.

1. An analogue gate comprising a first field-effect transistor, having asource receiving the input voltage, a drain supplying the output voltageand a gate, a switch, having one output connected to said transistorgate, a first input connected to a fixed potential capable of blockingsaid transistor, and a second input; a voltage follower, having an inputconnected to said drain, an output connected to said second switchinput; said switch having a control input, for switching at will, saidtwo switch inputs to said switch output.
 2. A gate as claimed in claim 1wherein said switch comprises a second transistor, having a source at afixed potential, a drain and a gate for receiving a two-level voltagefor blocking or unblocking said transistor, a third transistor having asource, a gate and a drain connected to said voltage follower output,said third transistor gate being connected to said second transistordrain, a resistor interconnecting said second transistor drain and saidthird transistor source.
 3. A gate as claimed in claim 2, wherein saidvoltage follower comprises a fourth transistor having a drain connectedto another fixed potential of a polarity opposite to said fixedpotential, a gate connected to said first transistor drain, and a sourceconnected to said third transistor drain, and a further resistor forconnecting said fourth transistor source to said fixed potential.
 4. Agate as claimed in claim 3, wherein said further resistor comprises, afifth transistor, having a drain connected to said fourth transistorsource and a gate and a source interconnected to said fixed potential.5. A gate as claimed in claim 4, wherein said transistors are of thedepletion type and have N-type channels.
 6. A gate as claimed in claim 1having components integrated upon the same substrate.